In the circuit shown in the figure, inputs A and B are both connected to a NAND gate and to an OR gate. The outputs of these two gates are the inputs of an AND gate, whose output is Y. For every combination of A and B, the circuit behaves like a single

Fig. 1: Inputs A and B both go to a NAND gate and to an OR gate. The outputs of these two gates are the inputs of an AND gate, whose output is Y.